Leading Electronics Firms Unite to Accelerate 'System-on-a-Chip' Industry

4 September, 1996

Unifying Vision and 'Open' De facto Standards Critical First Steps

SAN JOSE, Calif.-September 3, 1996. A group of more than 35 industry leading electronics firms today announced the formation of an open alliance to establish a unifying vision for the system-chip industry and the technical standards required to enable the "mix and match" of intellectual property (IP) blocks from multiple sources. This will accelerate and exponentially increase the system-chip market growth, while dramatically speeding design cycles, and lowering IP productization andsupport investments.

The group has set forth a crisp vision for creating intra- and inter- company worldwide IP networks. These networks will facilitate the rapid identification, evaluation, exchange, and design-in of intellectul property in the form of system-level macros, cores or megacells. In aggressive pursuit of this vision, the alliance will develop open IP design interface and productization standards. This group will employ a rapid prototyping approach to the development of de facto standards that combines the practical design experiences of semiconductor vendors, systems companies, independent IP providers, and electronic design automation (EDA) vendors. The standards work will begin with a baseline proposal called the Virtual Socket Interface(TM) (VSI).

The inaugural members of the group, referred to as the VSI Alliance, include in alphabetical order: Actel Corporation; Advanced RISC Machines; Advancel Logic Corporation; Alcatel Mietec; Altera Corporation; ASPEC Technology, Inc.; Cadence Design Systems, Inc.; Cirrus Logic Inc.; COMPASS Design Automation; CompCore Multimedia; DSP Group, Inc.; Excellent Design Inc.; Fujitsu Limited; Hitachi; Integrated Silicon Systems Ltd.; iReady Corporation; Mentor Graphics; National Semiconductor Corporation; NEC; Object Oriented Hardware; Phoenix Technologies Ltd. (Virtual Chips); PrairieComm, Inc.; RAPID Association; SAND Microelectronics, Inc.; Silicon Graphics Inc.; Sony Corporation; Summit Design, Inc.; Sun Microsystems Inc.; Synopsys, Inc.; Texas Instruments Semiconductor Group; 3Soft; Toshiba Corporation; TSMC; Viewlogic Systems, Inc.; VLSI Libraries Incorporated, VLSI Technology, Inc.; and Xilinx.

RAPID, the association of IP providers, issued the following statement. "To overcome the key barriers for growth in the system-chip industry, there must be a unified commitment with a clear voice from each segment. This commitment has clearly been established with the VSI Alliance."

Setting a Vision for the Future of System Chip Design

    It is envisioned that within a few years system-chip designers will access a web-based network to rapidly identify IP sources; evaluate alternatives for performance, cost, quality, and risk; and then quickly complete the appropriate internal or external transaction to receive all required information for design-in of the chosen IP. Candidate sources of IP will include internal corporate design groups, located at any site around the world, semiconductor vendors, EDA vendors, and independent IP providers.

    Gary Logston, director of ASIC technology and system architecture for Scientific Atlanta, Inc., a leading design and manufacturing company stated, "We are struggling to evaluate and acquire IP from four different sources to support a system-chip design in our next generation set-top box. What we need is the ability to more quickly access an internal and external network of IP sources. This is truly a critical success factor for our business."

    IP from all sources will be designed to common standards. Much like standardized physical components that are rapidly mixed and matched today on a printed circuit board, IP in standardized "virtual component" forms will be rapidly mixed and matched into system chips. Common interface standards will allow virtual components to fit quickly into "virtual sockets," at both the functional level (e.g., interface protocols) and the physical level (e.g., clock, test, and power structures). In addition, IP design data standards will be based on de facto, open formats supported by all EDA vendors. As such, IP providers will need only to productize and maintain one set of IP deliverables, rather than the many sets of IP deliverables required today to support unique customer design flows.

    Gary Smith, principal analyst for EDA at Dataquest stated, "EDA is $14,370,000,000 smaller than it should be, 1,500,000 gates shy of the available silicon. I would hate to estimate the revenue implications of this across the systems houses, semiconductor companies, and emerging IP suppliers. An educated guess would be that our lack of standards is preventing the entire system-chip industry from entering volume market. The question isn't whether or not we need the VSI Alliance, but why the industry waited so long."

Rapid Prototyping of De facto Standards

    The VSI Alliance goal is to aggressively jump-start the development of practical open de facto standards that govern the creation and exchange of these virtual components. Due to the urgency for these standards, the VSI Alliance is pursuing a two-pronged development effort. Multiple working groups consisting of representatives from all market segments (EDA, semiconductor, systems house, and IP providers) will develop standards proposals in each of the most critical design areas. These proposals will be submitted to a smaller team that will exercise the standards with continuous evaluation and rapid prototyping based on real-world system-chip design programs.

    According to T. Sasaki, general manager of corporate R&D strategy department at Sony Corporation, "IP standardization is what the industry needs to accelerate the system-chip development process. It will help spur the convergence of AV, computer and communication industries and consequently, promote the development of new products with true multimedia capabilities."

    The VSI Alliance will work with industry standards organizations to facilitate the formal adoption of VSI as it evolves. All major VSI releases will be available to industry standards organizations. Currently, the baseline VSI specification is available to all alliance members.

More Information

    The VSI Alliance is an open organization that includes representatives from all segments of the system-chip industry. Its goal is to accelerate the growth of the system-chip market by developing open technical standards to enable the mix and match of IP exchanged across intra- and inter-company Worldwide IP Networks (WIN). The VSI Alliance is openly soliciting wide industry participation. Membership is open to any corporation willing to support and use the open standards proposed and ratified by the VSI Alliance. For more information, visit the VSI Alliance web site at www.ip-net.org or email: info@ip-net.org

Virtual Socket Interface is a Trademark of the VSI Alliance.

Information in the press releases, including product prices and specifications, content of services and contact information, is current on the date of the press announcement,but is subject to change without prior notice.