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Toshiba Introduces New ASICs with 3.3V/ 5V Interface

28 August, 1995

TOKYO -- Toshiba Corporation today announced a new series of application specific integrated circuits (ASICs) that is capable of meeting both 3. 3V and 5V external voltage power supplies as well as achieving the indus try's highest technical specifications including the operating speed and the number of gates as ASICs in this category. Toshiba will start to ac cept development orders for the devices from December, 1995. TC203 is an ideal device for portable information processing equipment such as note book PCs, which integrate both 3.3V- and 5V-based components in a system and requires high degree of integration at the same time.

The new line-up is made up of three families: the TC203G series of g ate arrays, the TC203C series of cell-based ICs, and the TC203E series o f embedded arrays. All of these devices are based on the company's lates t version of gate arrays TC200 series, that only meets a single 3.3V ope ration.

While achieving a 3.3/5V twin-voltage capabilities in a single devic e, the TC203 series also maintained the industry's highest level specifi cations available at the latest TC200 series, namely;

(1) 0.4 micron CMOS technology (2) 0.19 nanosecond operating speed (TC203G, 203E), or 0.l 7 nanosecond (TC203C) (3) Estimated maximum usable gates of 690,000 for TC203G, 720,000 gates for TC203C, 690,000 gates for TC203E (4) Full lines of packaging available. CPGA (Ceramic Pin Grid Array), PF P (Plastic Flat Package), CFP (Ceramic Flat Package), PLCC (Plastic Lea dless Chip Carrier) and SVFP (Small Very Flat Package). BGA (Gall Grid Arra y) that offer high-pin-count and high dissipitation will be also availab le later. ASICs are highly versatile semicustom logic LSIs which can realize a diversity of user system needs in a relatively short period of time by wiring the semi-finished wafer cuircuits according to the customer requi rments.

Specifications

Process technology:  0.4 micron
Wiring technology:  2- or 3-metal layer CMOS Si-gate
Gate delay time: TC203G/E: 0.19 nanosecond
      two-input NAND high drive
      (F/O=2+Estimated wire loading) 
            TC203C:  0.17 nanosecond
      two-input NAND high drive
      (F/O=2+Estimated wire loading) 
Supply voltage:  3.3V/5V
Gates(Max./usable): TC203G series
   double layer wiring:  400,000 gates
   triple-layer wiring:  690,000 gates
   TC203C series
   double-layer wiring:  430,000 gates
   triple-layer wiring:  720,000 gates
   TC203E series
   double-layer wiring:  400,000 gates
   triple-layer wiring:  690,000 gates

Information in the press releases, including product prices and specifications, content of services and contact information, is current on the date of the press announcement,but is subject to change without prior notice.