Innovations in Manufacturing Engineering Overcoming Difficulties by Manufacturing Engineering Innovations NISHIDA Naoto Directions of Manufacturing Technologies Innovation KUBO Tomoaki To support putting new products on the market and to enhance the competitive power of current products with manufacturing technologies, Toshiba needs to keep making innovations in the fields of “ Creating Advanced Manufacturing Technology Elements,” “ Reforming of Manufacturing Operations,” and “ Strengthening of Product Design Technologies.” The directions of these innovations are the pursuit of total optimization and the development of core technologies. In the pursuit of total optimization, Design for Manufacturability (DFM) and simulation technologies become powerful tools. In the development of core technologies, the strengthening of processing technologies, the underlying technologies for product differentiation, and manufacturing technologies that are harmonized with the environment become important. Inkjet Coating Technology SAKURAI Naoaki/ SAWADA Yasuhiko/ FUCHIKAMI Yasuhiko A photoengraving process (PEP) is often utilized in the manufacturing of electronic devices such as semiconductors and flat-panel displays. Although it is useful for fabricating wiring, large amounts of direct and indirect materials are consumed in the resist, exposure, development, flaking off, and other processes. An inkjet process can solve these problems, but it is difficult to apply it to mass production because even one misdirection is not permissible in device manufacturing. Toshiba has developed an extremely stable inkjet system for electronic device production processes by developing various elemental coating technologies to overcome these issues. Virtual Debugging System for Manufacturing Equipment Control Software Development MIYAUCHI Takashi/ KOBAYASHI Daisuke/ FUJITA Kazuaki The debugging of manufacturing equipment control software has conventionally been performed using actual equipment. Going a step further, Toshiba has developed a virtual debugging system and applied it to the development of manufacturing equipment control software using virtual hardware prior to completion of the actual manufacturing equipment hardware. Moreover, we have advanced this system by adding a verification simulator in order to develop manufacturing equipment more rapidly and efficiently. The newly developed virtual debugging system has a flexible configuration of virtual hardware so that the system can be applied to various types of manufacturing equipment. We have already applied the system to our manufacturing equipment and confirmed that it can reduce the time required for software verification by 60%. System Construction for Quality Improvement Using Manufacturing Data KONDO Haruhiko To enhance production quality, which is one of the key aspects of manufacturing competitiveness, it is necessary to implement quality improvement activities by providing feedback of manufacturing quality information in order to continuously optimize the manufacturing process and the product design. To promote quality improvement activities, Toshiba has been constructing a quality control (QC) system using manufacturing data. We have confirmed the effectiveness of this system by applying it to processing production lines for products such as semiconductors and flat-panel displays, and to assembly lines for products such as hard disk drives and PCs. Methodology to Evaluate Effects of Improvements in Production Activities Using Financial Indicators YAMADA Shu/ KOTAKE Masahiro The major changes taking place in rapid succession in the business environment for digital products mean that advanced production processes are required to overcome competitors and survive in the market. With this as a background, Toshiba has developed a methodology for enterprise supply chains of digital product business units to evaluate the effects of improvements in production activities using financial indicators. This simulation model encompasses all areas of parts procurement, unit assembly, and shipping, and also includes planning and execution activities. We have successfully established an evaluation model for the entire supply chain of electric parts units that supports top-level decision-making in project planning. TCAD Through-Simulation for Realizing Semiconductor Process DFM ONOUE Seiji/ TERAMOTO Ryuichi/ SHIOYAMA Yoshiyuki As semiconductor design rules have continued to shrink in recent years, advanced processes and an increasing number of process steps have become necessary and the shortening of product development periods has become more difficult. Design for manufacturability (DFM) tools such as technology computer-aided design (TCAD) have been widely applied to the device design phase in order to improve the efficiency of development. However, such tools have been insufficiently utilized in the process development phase, leading to rework and delays during prototype wafer manufacturing. To overcome this problem, Toshiba has developed a TCAD through-simulation with models based on actual mass-production processes. This simulation makes it possible to achieve quantification of process margins without trial production and significantly reduce the product development period by quickly identifying potential development risks and performing early process optimization. Low-Cost Wafer-Level MEMS Packaging Technologies MIYAGI Takeshi/ OBATA Susumu/ SUGIZAKI Yoshiaki Microelectromechanical systems (MEMS) can provide functions and characteristics that are difficult to realize in a semiconductor device. However, the market for MEMS is restricted due to the high cost of packaging to protect micro-scale moving parts and so on. Toshiba has developed two in-line wafer-level packaging (WLP) technologies for RF-MEMS that allow cost reductions to be attained. These technologies realize encapsulation under an atmospheric pressure condition and under a vacuum condition, respectively. Applying these technologies to wafer-level production via a front-end process, we have achieved the world’s thinnest RF-MEMS multichip package of 0.8 mm in thickness by stacking a driver IC chip and a RF-MEMS chip with a thin-film hollow structure. Design Rules for Prevention of Molding Defects in Semiconductor Packages TANAKA Toru/ HADAME Yasuaki There is increasing demand for higher capacity and performance as well as thinner package size for multi-chip package (MCP) memory products in order to downsize handheld devices, such as cellular phones and PCs, as well as digital home appliances. Due to the application of MCPs to various types of semiconductor devices according to users’ requirements, the package structures of MCPs have become complicated. The utilization of design for manufacturability (DFM) in the processes of MCP memory packages has therefore become essential for the production of high-quality and low-cost packages with a short lead-time. Toshiba has developed design rules for package designers in order to prevent molding defects of MCP packages including voids, warps, and wire sweeps. Using these design rules, we have succeeded in reducing retrogression of the design process and expanding the types of MCP packages developed. Optical Simulation Analysis for Development of Leading-Edge Electronic Devices OKADA Naotada In the conventional optical simulation technique used for the design of optical devices, there has been a problem that the analysis error becomes large in the case of light-emitting elements with a complicated or fine structure corresponding to the wavelength of the light. With the drastic increase in computation power, illumination analysis by tracing several million rays and vector wave analysis by solving wave equations without approximation have recently become available for practical use in the field of optical simulation. Toshiba has applied these analysis techniques to the development of white light-emitting diodes (LEDs) for general lighting and complementary metal-oxide semiconductor (CMOS) sensors for camera modules, and confirmed that estimation of performance with high accuracy makes it possible to shorten the development period by the use of such simulations instead of trial production. Environmentally Conscious Semiconductor Resist Stripping Technology HAYAMIZU Naoya/ TANGE Makiko A resist is a masking material used in the lithographic process that forms semiconductor circuits on a chip substrate. The resist must be removed after circuits are etched, which is typically done with peroxymonosulfuric acid, conventionally produced by mixing sulfuric acid with hydrogen peroxide. However, once the process is completed, there is a problem that it is difficult to recycle the sulfuric acid because of dilution by the water released as a by-product of the breakdown of the hydrogen peroxide in the mixture. To improve the process, Toshiba, in cooperation with Shibaura Mechatronics Corporation and Chlorine Engineers Corp., Ltd., has developed a practical semiconductor single-wafer resist stripping technology that employs electrolyzed sulfuric acid. This technology allows the sulfuric acid to be recycled, as the electrolysis of sulfuric acid generates peroxymonosulfuric acid without producing water. Moreover, an originally developed boron-doped diamond electrode permits the electrolyzed sulfuric acid to be used directly without any danger. In addition, it is possible to control the stripping ability according to the various types of resist by optimizing the electrolyte parameters. This new technology makes it possible to totally eliminate the use of hydrogen peroxide and reduce the overall environmental burden of the semiconductor wet process. |